In one and three-phase voltage source inverters and converters, alternating voltage is generated usually from a constant DC bus voltage by switching on and off semiconductor switches in a bridge according to a PWM technique. The PWM technique which is very often used is based on the comparison of a triangular voltage with fixed frequency and a reference voltage with fixed or variable frequency (triangle comparison method).
A single-phase PWM converter consists of a PWM circuit (with control electronics), a semiconductor bridge, an AC voltage source in series with an inductor, and a load on the DC side. Because the load in a voltage source inverter (VSI) can be substituted with an inductor in series with an AC voltage source, the circuit topology for a VSI applies equally well for a voltage source converter (VSC). A single-phase PWM circuit typically consists of a triangle signal generator, a summer, and a comparator. The triangle signal generator produces a triangle signal U.sub.T having a carrier frequency f.sub.c, the peak values of the triangle being +U.sub.TP and -U.sub.TP. U.sub.T is subtracted from a reference phase voltage U.sub.A, in the summer, producing an error signal E.sub.A', which is provided to the comparator. In response, the comparator produces a switching signal U.sub.SA' that controls two complementary switches S1, S1*.
The bridge circuit, which receives the PWM signals for controlling S1 and S1*, consists of two circuits having the load in common. One circuit consists of a switching assembly, including a switch S1 and a freewheeling diode shunting that switch, a DC power supply having a voltage Udc/2, and a third element, the load. The second loop consists of a second switching assembly, including a switch S1* responsive to a NOT gate and a freewheeling diode shunting the switch, a second DC power supply having a voltage Udc/2, and a third element, the load. The two circuits apply a voltage of magnitude Udc/2 across the load Z.sub.A'. When S1 is closed, the polarity of the voltage is opposite the polarity when S1* is closed. If E.sub.A' &gt;0 or U.sub.A' &gt;U.sub.T, the output U.sub.SA' of the comparator assumes a value equal to 1. The first switch S1 is now closed and the second S* opened. The voltage U.sub.A'O across the load, between the line midpoint and the supply midpoint, is Udc/2. On the other hand, if E.sub.A' &lt;0, or U.sub.A' =U.sub.T, the output U.sub.SA' of the comparator is zero. The switch S1* is now closed and the first switch S1 is opened. A negative voltage U.sub.A'O =-Udc/2 is applied across the load Z.sub.A'.
When U.sub.A' is positive, over a period 1/f.sub.c, the switching voltage U.sub.SA' is equal to 1 for a time longer than it is equal to 0, and so S1 is closed more of the time and S1* less of the time; the average value of load voltage U.sub.A'O is positive. When U.sub.A' is 0, U.sub.SA' (over a period 1/f.sub.c) is 1 for the same amount of time as it is 0, S1 is closed for the same amount of time as it is open, and S1* is correspondingly open for the same amount of time as it is closed; the average load voltage U.sub.A'O is 0. When U.sub.A' is a negative, U.sub.SA' (over a period 1/f.sub.c) is 0 for a time longer than it is 1, and S1* is closed more of the time than S1; the average load voltage is negative.
If the carrier frequency f.sub.c is much higher than the frequency f.sub.R of the reference signal U.sub.A', the locally averaged supply phase voltage across the load mostly follows the reference phase voltage U.sub.A'. An amplitude modulation index m.sub.A is defined as a ratio of the peak value of sinusoidal reference voltage U.sub.A' and peak value U.sub.TP of the triangular voltage U.sub.T. The average load voltage within each period of the triangle wave is a locally averaged voltage U.sub.AOLAVR and tracks U.sub.A' so long as the magnitude of U.sub.A' is less than U.sub.TP. To the extent that the locally averaged voltage U.sub.AOLAVR tracks U.sub.A', the inverter output is a linear function of its input U.sub.A'. The peak value of U.sub.AOLAVR =m.sub.A * Udc/2 as long as the modulation index m.sub.A is smaller than 1. For a modulation index m.sub.A equal to 1, the maximum locally averaged voltage U.sub.AOLAVR is applied to the load, and the saturation limit of the PWM circuit is reached. Accordingly, m.sub.A .ltoreq.1 provides a linear system while m.sub.A &gt;1 provides a non-linear system. Stated differently, the locally averaged voltage U.sub.AOLAVR follows U.sub.A', so long as .vertline.U.sub.TP .vertline. is .gtoreq..vertline.U.sub.A' .vertline.. Further increase in the reference voltage U.sub.A' is not followed by a proportional increase of the load voltage U.sub.A'O.
The analysis for a three-phase inverter is similar because it is simply the sum of three single-phase inverters.
For a three-phase system, the line voltage U.sub.L is U.sub.P * .sqroot.3 times bigger the phase voltage U.sub.P. For a PWM inverter/converter with a triangular PWM technique, the peak value of the phase voltage that can be achieved is U.sub.P =Udc/2, and therefore the peak line-to-line voltage, is equal to (Udc/2) *.sqroot.3.
The three-phase PWM inverter has problems. First, in the three-phase bridge, the peak value that the line voltage can reach is U.sub.DC. This is 15.4% higher than (Udc/2) * .sqroot.3, the value that can be reached by the triangle comparison method. The possibility of increasing phase voltages by 15.4% without saturation, by applying different modulation techniques, is clear. For an inverter, this means a 15.4% increase in output voltage. For a converter this means a 15.4% increase in the allowed input voltage. Second, saturation of the PWM circuit causes a reduction of gain in the voltage/current control loops using the PWM and deterioration of the dynamic characteristics of the inverter. Third, the PWM circuit produces commutation losses in proportion to the high carrier frequency f.sub.c.
One method of providing both extended voltage range and reduced commutation losses is reported by Malesani, L. and Tenti, P., et al., "Improved Current Control Technique of VSI PWM Inverters with Constant Modulation Frequency and Extended Voltage Range", IEEE-IAS. Conference Record of the 1988 IEEE Industry Applications Society Annual Meeting 23rd. This method modifies conventional hysteresis current regulators. A hysteresis current regulator compares a current fed back from a phase current and provides a current error signal to a hysteresis comparator which provides PWM signals to complementary switches in a leg of a bridge. Malesani, L., et al., modifies conventional three-phase hysteresis to achieve an approximately 15% increase in inverter output voltage and regulates to reduce commutation losses, by a factor of one-third, by performing modulations on only two inverter legs at a time, while the third stands at the positive or negative pole of the supply voltage. Phase current error beyond a hysteresis band is the index for determining which leg will stand.
Hysteresis regulators are not suitable for microprocessor software implementation because they require fast comparators which must change state in response to the controlled variables independently of the sampling intervals of the microprocessor. Hysteresis regulators are normally implemented in hardware.